User:Evie (Torchickens)/Sandbox: Difference between revisions
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*[https://rgbds.gbdev.io/docs/v0.3.5/gbz80.7 Cycles]
*[https://gbdev.gg8.se/wiki/articles/OAM_DMA_tutorial DMA transfer]: ~160 microseconds
*~FF46 write - began OAM DMA transfer (one byte RAM specified for h (high byte) in RAM pointer that mirrors rDMA/FEXX-9F (you know this))
*"[https://gbdev.io/pandocs/STAT.html LY indicates the current horizontal line, which might be about to be drawn, being drawn, or just been drawn. LY can hold any value from 0 to 153, with values from 144 to 153 indicating the VBlank period]."
*You can only access HRAM while a DMA transfer is taking place.
*"[[RNG correlation (Generation I)|the rDIV register, which itself is incremented at a rate of 16384Hz (~16779Hz on SGB)]]"
*From that RNG correlation article "516 cycles (2.015625 rDIV periods)" - so just say 2/516 (1/258 rDIV) for one cycle.
*[https://gbdev.io/pandocs/OAM_Corruption_Bug.html OAM corruption bug]
*[https://gbdev.gg8.se/wiki/articles/Video_Display Video
*[https://www.3bscientific.com/gb/microsecond-counter-230-v-5060-hz-1017333-u8498285-230-3b-scientific,p_813_25740.html Microsecond counter]
*It's more complex than this, but just leave these notes for now.
To-do: Defaults and relationship with Game Boy, GBC, SGB boot ROMs.
==Hexadecimal byte representation of Cryo's real-time RAM writer for writing code using button sequences==
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