User:Evie (Torchickens)/Sandbox: Difference between revisions
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*You can only access HRAM while a DMA transfer is taking place.
*"[[RNG correlation (Generation I)|the rDIV register, which itself is incremented at a rate of 16384Hz (~16779Hz on SGB)]]"
*From that RNG correlation article "516 cycles (2.015625 rDIV periods)" - so just say 2/516 (1/258 rDIV) for one cycle.
*[https://gbdev.io/pandocs/OAM_Corruption_Bug.html OAM corruption bug]
*[https://gbdev.gg8.se/wiki/articles/Video_Display Video Deisplay]
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